Searched refs:subw (Results 1 - 5 of 5) sorted by relevance
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/ |
H A D | subw.S | 4 # subw.S 7 # Test subw instruction. 20 TEST_RR_OP( 2, subw, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); 21 TEST_RR_OP( 3, subw, 0x0000000000000000, 0x0000000000000001, 0x0000000000000001 ); 22 TEST_RR_OP( 4, subw, 0xfffffffffffffffc, 0x0000000000000003, 0x0000000000000007 ); 24 TEST_RR_OP( 5, subw, 0x0000000000008000, 0x0000000000000000, 0xffffffffffff8000 ); 25 TEST_RR_OP( 6, subw, 0xffffffff80000000, 0xffffffff80000000, 0x0000000000000000 ); 26 TEST_RR_OP( 7, subw, 0xffffffff80008000, 0xffffffff80000000, 0xffffffffffff8000 ); 28 TEST_RR_OP( 8, subw, 0xffffffffffff8001, 0x0000000000000000, 0x0000000000007fff ); 29 TEST_RR_OP( 9, subw, [all...] |
/gem5/tests/test-progs/insttest/src/riscv/ |
H A D | rv64i.cpp | 400 expect<int64_t>(65535, []{return I::subw(65536, 1);}, "subw"); 401 expect<int64_t>(-1, []{return I::subw(0x7FFFFFFF, 0x80000000);}, 402 "subw, \"overflow\""); 404 []{return I::subw(0xAAAAAAAAFFFFFFFFULL, 0x55555555FFFFFFFFULL);}, 405 "subw, truncate");
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H A D | rv64i.h | 409 subw(int64_t rs1, int64_t rs2) function in namespace:I 412 ROP("subw", rd, rs1, rs2);
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uc/ |
H A D | rvc.S | 65 RVC_TEST_CASE (19, s1, 0xffffffff80000000, li s1, 0x7fffffff; li a0, -1; c.subw s1, a0)
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/gem5/tests/test-progs/asmtest/src/riscv/env/ |
H A D | encoding.h | 1013 DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
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