Searched refs:sc_signal_logic_vector4 (Results 1 - 15 of 15) sorted by relevance

/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/
H A Dcommon.h45 typedef sc_signal<sc_lv<4> > sc_signal_logic_vector4; typedef
H A Ddisplay.h55 const sc_signal_logic_vector4& in_value9; // Output port
73 const sc_signal_logic_vector4& IN_VALUE9,
H A Ddatatypes.h63 const sc_signal_logic_vector4& in_value10; // Input port
74 sc_signal_logic_vector4& out_value9; // Output port
95 const sc_signal_logic_vector4& IN_VALUE10,
107 sc_signal_logic_vector4& OUT_VALUE9,
H A Dmain.cpp55 sc_signal_logic_vector4 stimulus_line10;
67 sc_signal_logic_vector4 result_line9;
H A Dstimulus.h57 sc_signal_logic_vector4& out_value10; // Output port
78 sc_signal_logic_vector4& OUT_VALUE10,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/
H A Dcommon.h45 typedef sc_signal<sc_lv<4> > sc_signal_logic_vector4; typedef
H A Ddisplay.h55 const sc_signal_logic_vector4& in_value9; // Output port
73 const sc_signal_logic_vector4& IN_VALUE9,
H A Ddatatypes.h63 const sc_signal_logic_vector4& in_value10; // Input port
74 sc_signal_logic_vector4& out_value9; // Output port
95 const sc_signal_logic_vector4& IN_VALUE10,
107 sc_signal_logic_vector4& OUT_VALUE9,
H A Dmain.cpp55 sc_signal_logic_vector4 stimulus_line10;
67 sc_signal_logic_vector4 result_line9;
H A Dstimulus.h57 sc_signal_logic_vector4& out_value10; // Output port
78 sc_signal_logic_vector4& OUT_VALUE10,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/
H A Dcommon.h45 typedef sc_signal<sc_lv<4> > sc_signal_logic_vector4; typedef
H A Ddisplay.h55 const sc_signal_logic_vector4& in_value9; // Output port
73 const sc_signal_logic_vector4& IN_VALUE9,
H A Ddatatypes.h63 const sc_signal_logic_vector4& in_value10; // Input port
74 sc_signal_logic_vector4& out_value9; // Output port
95 const sc_signal_logic_vector4& IN_VALUE10,
107 sc_signal_logic_vector4& OUT_VALUE9,
H A Dmain.cpp55 sc_signal_logic_vector4 stimulus_line10;
67 sc_signal_logic_vector4 result_line9;
H A Dstimulus.h57 sc_signal_logic_vector4& out_value10; // Output port
78 sc_signal_logic_vector4& OUT_VALUE10,

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