Searched refs:regVec (Results 1 - 3 of 3) sorted by relevance
/gem5/src/gpu-compute/ |
H A D | vector_register_file.cc | 196 std::vector<uint32_t> ®Vec, uint32_t operandSize, 201 panic_if(regVec.size() <= 0, "Illegal VGPR vector size=%d\n", 202 regVec.size()); 204 for (int i = 0; i < regVec.size(); ++i) { 206 computeUnit->registerEvent(w->simdId, regVec[i], operandSize, 195 exec(uint64_t dynamic_id, Wavefront *w, std::vector<uint32_t> ®Vec, uint32_t operandSize, uint64_t timestamp) argument
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H A D | vector_register_file.hh | 102 std::vector<uint32_t> ®Vec, uint32_t operandSize,
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/gem5/src/arch/hsail/insts/ |
H A D | mem.hh | 529 std::vector<uint32_t> regVec; variable 542 regVec.push_back(physVgpr); 567 vrf[w->simdId]->exec(gpuDynInst->seqNum(), w, regVec, 1521 std::vector<uint32_t> regVec; variable 1524 regVec.push_back(physVgpr); 1545 vrf[w->simdId]->exec(gpuDynInst->seqNum(), w, regVec,
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