Searched refs:handleLockedWrite (Results 1 - 9 of 9) sorted by relevance
| /gem5/src/arch/generic/ |
| H A D | locked_mem.hh | 79 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask) function in namespace:TheISA
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| /gem5/src/arch/alpha/ |
| H A D | locked_mem.hh | 102 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask) function in namespace:AlphaISA
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| /gem5/src/arch/mips/ |
| H A D | locked_mem.hh | 95 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask) function in namespace:MipsISA
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| /gem5/src/arch/riscv/ |
| H A D | locked_mem.hh | 102 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask) function in namespace:RiscvISA
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| /gem5/src/arch/arm/ |
| H A D | locked_mem.hh | 114 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask) function in namespace:ArmISA
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| /gem5/src/cpu/simple/ |
| H A D | atomic.cc | 502 TheISA::handleLockedWrite(thread, req,
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| H A D | timing.cc | 307 do_access = TheISA::handleLockedWrite(thread, req, dcachePort.cacheBlockMask);
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| /gem5/src/cpu/o3/ |
| H A D | lsq_unit_impl.hh | 795 bool success = TheISA::handleLockedWrite(inst.get(),
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| /gem5/src/cpu/minor/ |
| H A D | lsq.cc | 1129 do_access = TheISA::handleLockedWrite(&context,
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