Searched refs:exist (Results 1 - 9 of 9) sorted by relevance
/gem5/ext/mcpat/ |
H A D | core.h | 75 bool exist; member in class:BranchPredictor 121 bool exist; member in class:InstFetchU 149 bool exist; member in class:SchedulerU 175 bool exist; member in class:RENAMINGU 198 bool exist; member in class:LoadStoreU 246 bool exist; member in class:MemManU 270 bool exist; member in class:RegFU 300 bool exist; member in class:EXECU
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H A D | core.cc | 59 core_params(_core_params), core_stats(_core_stats), exist(exist_) { 60 if (!exist) return; 289 core_params(_core_params), core_stats(_core_stats), exist(exist_) { 290 if (!exist) return; 510 core_params(_core_params), core_stats(_core_stats), exist(exist_) { 511 if (!exist) return; 800 core_params(_core_params), core_stats(_core_stats), exist(exist_) { 801 if (!exist) return; 913 core_params(_core_params), core_stats(_core_stats), exist(exist_) { 914 if (!exist) retur [all...] |
H A D | logic.h | 227 bool exist; member in class:UndiffCore
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H A D | logic.cc | 723 exist(exist_) { 724 if (!exist) return;
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64si/ |
H A D | scall.S | 34 # Otherwise, if in S mode, then U mode must exist and we don't need to check. 41 # If U mode doesn't exist, mcause should indicate ECALL from M mode.
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H A D | csr.S | 27 # For RV64, make sure UXL encodes RV64. (UXL does not exist for RV32.) 30 # Otherwise, if in S mode, then U mode must exist and we don't need to check.
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/gem5/ext/mcpat/cacti/ |
H A D | decoder.h | 58 bool exist; member in class:Decoder 95 bool exist; member in class:PredecBlk
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H A D | decoder.cc | 55 : exist(false), 78 exist = true; 84 exist = true; 111 if (exist) { 145 if (exist) { // First check if this decoder exists 180 if (exist) { 240 if (exist) 273 exist(false), 312 exist = true; 317 exist [all...] |
H A D | mat.cc | 160 // row_dec->exist = true; 537 if (row_dec->exist == true) { 590 if (row_dec->exist == false) { 982 //in idle state, Ig_on only possibly exist in access transistors of read only ports 1092 //in idle state, Ig_on only possibly exist in access transistors of read only ports
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