H A D | execute.cc | 216 Execute::tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch) argument 222 /* Force a branch for SerializeAfter/SquashAfter instructions 239 /* The reason for the branch data we're about to generate, set below */ 252 /* Predicted to branch */ 254 /* No branch was taken, change stream to get us back to the 256 DPRINTF(Branch, "Predicted a branch from 0x%x to 0x%x but" 262 /* Branch prediction got the right target, kill the branch and 264 * Note that this information to the branch predictor might get 265 * overwritten by a "real" branch during this cycle */ 266 DPRINTF(Branch, "Predicted a branch fro 295 updateBranchData( ThreadID tid, BranchData::Reason reason, MinorDynInstPtr inst, const TheISA::PCState &target, BranchData &branch) argument 321 handleMemResponse(MinorDynInstPtr inst, LSQ::LSQRequestPtr response, BranchData &branch, Fault &fault) argument 418 takeInterrupt(ThreadID thread_id, BranchData &branch) argument 448 executeMemRefInst(MinorDynInstPtr inst, BranchData &branch, bool &passed_predicate, Fault &fault) argument 890 commitInst(MinorDynInstPtr inst, bool early_memory_issue, BranchData &branch, Fault &fault, bool &committed, bool &completed_mem_issue) argument 1023 commit(ThreadID thread_id, bool only_commit_microops, bool discard, BranchData &branch) argument 1418 BranchData &branch = *out.inputWire; local 1599 checkInterrupts(BranchData& branch, bool& interrupted) argument [all...] |