| /gem5/src/base/loader/ |
| H A D | raw_object.cc | 48 text.baseAddr = 0;
52 data.baseAddr = 0;
56 bss.baseAddr = 0;
61 text.baseAddr, text.size, data.baseAddr, data.size,
62 bss.baseAddr, bss.size);
78 symtab->insert(text.baseAddr & addr_mask, filename.substr(fnameStart,
89 symtab->insert(text.baseAddr & addr_mask, filename.substr(fnameStart,
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| H A D | aout_object.cc | 65 text.baseAddr = N_TXTADDR(*execHdr);
69 data.baseAddr = N_DATADDR(*execHdr);
73 bss.baseAddr = N_BSSADDR(*execHdr);
78 text.baseAddr, text.size, data.baseAddr, data.size,
79 bss.baseAddr, bss.size);
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| H A D | object_file.hh | 120 Addr baseAddr; member in struct:ObjectFile::Section
141 Addr textBase() const { return text.baseAddr; }
142 Addr dataBase() const { return data.baseAddr; }
143 Addr bssBase() const { return bss.baseAddr; }
154 void setTextBase(Addr a) { text.baseAddr = a; }
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| H A D | ecoff_object.cc | 76 text.baseAddr = aoutHdr->text_start;
80 data.baseAddr = aoutHdr->data_start;
84 bss.baseAddr = aoutHdr->bss_start;
89 text.baseAddr, text.size, data.baseAddr, data.size,
90 bss.baseAddr, bss.size);
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| H A D | dtb_object.cc | 58 text.baseAddr = 0;
62 data.baseAddr = 0;
66 bss.baseAddr = 0;
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| H A D | elf_object.cc | 298 text.baseAddr = data.baseAddr = bss.baseAddr = 0;
355 bss.baseAddr = phdr.p_paddr + phdr.p_filesz;
368 text.baseAddr = phdr.p_paddr;
373 data.baseAddr = phdr.p_paddr;
380 extra.baseAddr = phdr.p_paddr;
393 text.baseAddr, text.size, data.baseAddr, data.size,
394 bss.baseAddr, bs
[all...] |
| H A D | object_file.cc | 80 Addr addr = (sec->baseAddr & addr_mask) + offset;
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| /gem5/src/mem/cache/prefetch/ |
| H A D | indirect_memory.hh | 84 Addr baseAddr; member in struct:IndirectMemoryPrefetcher::PrefetchTableEntry
99 enabled(false), index(0), baseAddr(0), shift(0),
110 baseAddr = 0;
135 std::vector<std::vector<Addr>> baseAddr; member in struct:IndirectMemoryPrefetcher::IndirectPatternDetectorEntry
140 baseAddr(num_addresses, std::vector<Addr>(num_shifts))
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| H A D | bop.hh | 84 Addr baseAddr; member in struct:BOPPrefetcher::DelayQueueEntry
87 DelayQueueEntry(Addr x, Tick t) : baseAddr(x), processTick(t)
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| H A D | indirect_memory.cc | 150 Addr pf_addr = pt_entry->baseAddr +
202 // If the second index is not set, we are just filling the baseAddr
204 assert(entry->numMisses < entry->baseAddr.size());
205 std::vector<Addr> &ba_array = entry->baseAddr[entry->numMisses];
212 if (entry->numMisses == entry->baseAddr.size()) {
227 std::vector<Addr> &ba_array = entry->baseAddr[midx];
235 pt_entry->baseAddr = ba_array[idx];
255 if (addr == pt_entry.baseAddr +
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| H A D | bop.cc | 101 Addr addr_x = delayQueue.front().baseAddr;
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| /gem5/src/dev/pci/ |
| H A D | device.cc | 102 config.baseAddr[0] = htole(p->BAR0);
103 config.baseAddr[1] = htole(p->BAR1);
104 config.baseAddr[2] = htole(p->BAR2);
105 config.baseAddr[3] = htole(p->BAR3);
106 config.baseAddr[4] = htole(p->BAR4);
107 config.baseAddr[5] = htole(p->BAR5);
207 BARAddrs[i] = p->LegacyIOBase + letoh(config.baseAddr[i]);
208 config.baseAddr[i] = 0;
368 uint32_t he_old_bar = letoh(config.baseAddr[barnum]);
389 config.baseAddr[barnu
[all...] |
| H A D | pcireg.h | 72 uint32_t baseAddr[6]; member in struct:PCIConfig::__anon62
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| /gem5/src/dev/storage/ |
| H A D | ide_disk.hh | 72 uint32_t baseAddr; member in struct:PrdEntry
83 return (entry.baseAddr & PRD_BASE_MASK);
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| H A D | ide_disk.cc | 371 "PRD: baseAddr:%#x (%#x) byteCount:%d (%d) eot:%#x sector:%d\n",
1137 SERIALIZE_SCALAR(curPrd.entry.baseAddr);
1190 UNSERIALIZE_SCALAR(curPrd.entry.baseAddr);
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| /gem5/src/gpu-compute/ |
| H A D | gpu_tlb.cc | 889 Addr baseAddr = localApicBase.base * PageBytes; local
892 if (baseAddr <= paddr && baseAddr + PageBytes > paddr) {
896 paddr - baseAddr));
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| /gem5/src/dev/arm/ |
| H A D | ufs_device.hh | 297 * baseAddr: Lower 32bit physical address DW-0
303 uint32_t baseAddr; member in struct:UFSHostDevice::UFSHCDSGEntry
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| H A D | ufs_device.cc | 1629 (sglist[count].baseAddr & 0xFFFFFFFF);
1949 (sglist[count].baseAddr & 0xFFFFFFFF);
2137 (sglist[count].baseAddr & 0xFFFFFFFF);
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