Searched refs:MISCREG_DEBUG (Results 1 - 3 of 3) sorted by relevance
/gem5/src/arch/mips/ | ||
H A D | utility.hh | 78 RegVal Dbg = tc->readMiscReg(MISCREG_DEBUG); |
H A D | registers.hh | 229 MISCREG_DEBUG = 184, //Bank 23: 184-191 enumerator in enum:MipsISA::MiscRegIndex |
H A D | isa.cc | 133 MISCREG_DEBUG, MISCREG_LLADDR |
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