Searched refs:Load (Results 1 - 7 of 7) sorted by relevance

/gem5/src/arch/riscv/insts/
H A Dmem.cc48 Load::generateDisassembly(Addr pc, const SymbolTable *symtab) const
H A Dmem.hh55 class Load : public MemInst class in namespace:RiscvISA
/gem5/src/gpu-compute/
H A Dgpu_static_inst.hh113 bool isLoad() const { return _flags[Load]; }
146 return (_flags[KernArgSegment] || _flags[ArgSegment]) && _flags[Load];
/gem5/ext/systemc/src/sysc/qt/md/
H A Dhppa.s209 ldw -36(%sp),%arg0 ; Load args to integer registers.
216 fldws -4(%r22),%farg0 ; Load args to floating-point registers.
H A Dksr1.s253 # Load the special registers. We don't load the stack ptr because
311 # Load 8 registers at once...source must be a multiple of 64
/gem5/src/arch/hsail/insts/
H A Dpseudo_inst.cc707 setFlag(Load);
H A Dmem.hh228 setFlag(Load);

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