Searched refs:LCR (Results 1 - 2 of 2) sorted by relevance
/gem5/src/dev/serial/ |
H A D | uart8250.cc | 90 : Uart(p, 8), IER(0), DLAB(0), LCR(0), MCR(0), lastTxInt(0), 108 if (!(LCR & 0x80)) { // read byte 126 if (!(LCR & 0x80)) { // Intr Enable Register(IER) 145 case 0x3: // Line Control Register (LCR) 146 pkt->setRaw(LCR); 191 if (!(LCR & 0x80)) { // write byte 202 if (!(LCR & 0x80)) { // Intr Enable Register(IER) 248 case 0x3: // Line Control Register (LCR) 249 LCR = pkt->getRaw<uint8_t>(); 292 SERIALIZE_SCALAR(LCR); [all...] |
H A D | uart8250.hh | 73 uint8_t IER, DLAB, LCR, MCR; member in class:Uart8250
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