/gem5/src/arch/alpha/ |
H A D | interrupts.cc | 33 AlphaISA::Interrupts * 36 return new AlphaISA::Interrupts(this);
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H A D | interrupts.hh | 49 class Interrupts : public SimObject class in namespace:AlphaISA 70 Interrupts(Params * p) : SimObject(p), cpu(NULL) function in class:AlphaISA::Interrupts 117 DPRINTF(Interrupt, "Interrupts all cleared\n");
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/gem5/src/arch/power/ |
H A D | interrupts.cc | 33 PowerISA::Interrupts * 36 return new PowerISA::Interrupts(this);
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H A D | interrupts.hh | 43 class Interrupts : public SimObject class in namespace:PowerISA 57 Interrupts(Params * p) : SimObject(p), cpu(NULL) function in class:PowerISA::Interrupts 69 panic("Interrupts::post not implemented.\n"); 75 panic("Interrupts::clear not implemented.\n"); 81 panic("Interrupts::clearAll not implemented.\n"); 87 panic("Interrupts::checkInterrupts not implemented.\n"); 94 panic("Interrupts::getInterrupt not implemented.\n"); 100 panic("Interrupts::updateIntrInfo not implemented.\n");
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/gem5/src/arch/sparc/ |
H A D | interrupts.cc | 33 SparcISA::Interrupts * 36 return new SparcISA::Interrupts(this);
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H A D | interrupts.hh | 58 class Interrupts : public SimObject class in namespace:SparcISA 82 Interrupts(Params * p) : SimObject(p), cpu(NULL) function in class:SparcISA::Interrupts
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H A D | tlb.cc | 1020 SparcISA::Interrupts * interrupts = 1021 dynamic_cast<SparcISA::Interrupts *>( 1028 SparcISA::Interrupts * interrupts = 1029 dynamic_cast<SparcISA::Interrupts *>( 1277 SparcISA::Interrupts * interrupts = 1278 dynamic_cast<SparcISA::Interrupts *>(
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/gem5/src/arch/riscv/ |
H A D | interrupts.cc | 33 RiscvISA::Interrupts * 36 return new RiscvISA::Interrupts(this);
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H A D | interrupts.hh | 54 class Interrupts : public SimObject class in namespace:RiscvISA 70 Interrupts(Params * p) : SimObject(p), cpu(nullptr), ip(0), ie(0) {} function in class:RiscvISA::Interrupts
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/gem5/src/arch/mips/ |
H A D | interrupts.cc | 59 Interrupts::post(int int_num, ThreadContext* tc) 71 Interrupts::post(int int_num, int index) 73 fatal("Must use Thread Context when posting MIPS Interrupts in M5"); 77 Interrupts::clear(int int_num, ThreadContext* tc) 89 Interrupts::clear(int int_num, int index) 91 fatal("Must use Thread Context when clearing MIPS Interrupts in M5"); 95 Interrupts::clearAll(ThreadContext *tc) 97 DPRINTF(Interrupt, "Interrupts all cleared\n"); 103 Interrupts::clearAll() 105 fatal("Must use Thread Context when clearing MIPS Interrupts i [all...] |
H A D | interrupts.hh | 49 class Interrupts : public SimObject class in namespace:MipsISA 60 Interrupts(Params * p) : SimObject(p) function in class:MipsISA::Interrupts 115 fatal("Serialization of Interrupts Unimplemented for MIPS"); 121 fatal("Unserialization of Interrupts Unimplemented for MIPS");
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/gem5/src/arch/x86/ |
H A D | interrupts.cc | 191 X86ISA::Interrupts::read(PacketPtr pkt) 208 X86ISA::Interrupts::write(PacketPtr pkt) 225 X86ISA::Interrupts::requestInterrupt(uint8_t vector, 275 X86ISA::Interrupts::setCPU(BaseCPU * newCPU) 290 X86ISA::Interrupts::init() 307 X86ISA::Interrupts::recvMessage(PacketPtr pkt) 335 X86ISA::Interrupts::recvResponse(PacketPtr pkt) 351 X86ISA::Interrupts::getAddrRanges() const 361 X86ISA::Interrupts::getIntAddrRange() const 372 X86ISA::Interrupts 599 X86ISA::Interrupts::Interrupts(Params * p) function in class:X86ISA::Interrupts [all...] |
H A D | interrupts.hh | 75 class Interrupts : public PioDevice, IntDevice class in namespace:X86ISA 175 IntSlavePort<Interrupts> intSlavePort; 249 Interrupts(Params * p); 285 panic("Interrupts::post unimplemented!\n"); 291 panic("Interrupts::clear unimplemented!\n"); 297 panic("Interrupts::clearAll unimplemented!\n");
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H A D | utility.cc | 185 Interrupts * interrupts = dynamic_cast<Interrupts *>(
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/gem5/src/arch/arm/ |
H A D | interrupts.cc | 44 ArmISA::Interrupts * 47 return new ArmISA::Interrupts(this); 51 ArmISA::Interrupts::takeInt(ThreadContext *tc, InterruptTypes int_type) const
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H A D | interrupts.hh | 59 class Interrupts : public SimObject class in namespace:ArmISA 83 Interrupts(Params * p) : SimObject(p), cpu(NULL) function in class:ArmISA::Interrupts 122 DPRINTF(Interrupt, "Interrupts all cleared\n");
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/gem5/src/dev/x86/ |
H A D | i82094aa.hh | 46 class Interrupts;
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H A D | i82094aa.cc | 223 Interrupts *localApic = sys->getThreadContext(i)->
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/gem5/src/cpu/ |
H A D | base.hh | 222 std::vector<TheISA::Interrupts*> interrupts; 225 TheISA::Interrupts *
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