Searched refs:GICC_PMR (Results 1 - 4 of 4) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v2.hh96 GICC_PMR = 0x04, // Interrupt priority mask enumerator in enum:GicV2::__anon123
H A Dgic_v3_cpu_interface.hh167 GICC_PMR = 0x0004, enumerator in enum:Gicv3CPUInterface::__anon5
H A Dgic_v2.cc316 case GICC_PMR:
582 case GICC_PMR:
746 // Priorities below that set in GICC_PMR can be ignored
/gem5/src/arch/arm/kvm/
H A Dgic.cc350 copyCpuRegister(from, to, ctx, GICC_PMR);

Completed in 12 milliseconds