Searched refs:BranchData (Results 1 - 9 of 9) sorted by relevance
| /gem5/src/cpu/minor/ |
| H A D | pipe_data.cc | 46 operator <<(std::ostream &os, BranchData::Reason reason)
50 case BranchData::NoBranch:
53 case BranchData::UnpredictedBranch:
56 case BranchData::BranchPrediction:
59 case BranchData::CorrectlyPredictedBranch:
62 case BranchData::BadlyPredictedBranch:
65 case BranchData::BadlyPredictedBranchTarget:
68 case BranchData::Interrupt:
71 case BranchData::SuspendThread:
74 case BranchData
[all...] |
| H A D | pipe_data.hh | 64 class BranchData /* : public ReportIF, public BubbleIF */ class in namespace:Minor
102 static bool isStreamChange(const BranchData::Reason reason);
107 static bool isBranch(const BranchData::Reason reason);
127 BranchData() : function in class:Minor::BranchData
133 BranchData( function in class:Minor::BranchData
149 static BranchData bubble() { return BranchData(); }
163 std::ostream &operator <<(std::ostream &os, BranchData::Reason reason);
165 /** Print BranchData contents in a format suitable for DPRINTF comments, not
167 std::ostream &operator <<(std::ostream &os, const BranchData
[all...] |
| H A D | execute.hh | 69 Latch<BranchData>::Input out;
219 void tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch);
223 void updateBranchData(ThreadID tid, BranchData::Reason reason,
225 BranchData &branch);
233 LSQ::LSQRequestPtr response, BranchData &branch,
247 bool executeMemRefInst(MinorDynInstPtr inst, BranchData &branch,
258 bool takeInterrupt(ThreadID thread_id, BranchData &branch);
274 ThreadID checkInterrupts(BranchData& branch, bool& interrupted);
295 BranchData &branch, Fault &fault, bool &committed,
306 BranchData
[all...] |
| H A D | fetch2.hh | 72 Latch<BranchData>::Output branchInp;
75 Latch<BranchData>::Input predictionOut;
190 void updateBranchPrediction(const BranchData &branch);
195 void predictBranch(MinorDynInstPtr inst, BranchData &branch);
206 Latch<BranchData>::Output branchInp_,
207 Latch<BranchData>::Input predictionOut_,
|
| H A D | pipeline.hh | 80 Latch<BranchData> f2ToF1;
83 Latch<BranchData> eToF1;
|
| H A D | fetch2.cc | 59 Latch<BranchData>::Output branchInp_,
60 Latch<BranchData>::Input predictionOut_,
126 Fetch2::updateBranchPrediction(const BranchData &branch)
135 case BranchData::NoBranch:
138 case BranchData::Interrupt:
141 case BranchData::SuspendThread:
144 case BranchData::HaltFetch:
147 case BranchData::BranchPrediction:
151 case BranchData::UnpredictedBranch:
161 case BranchData
[all...] |
| H A D | fetch1.hh | 195 Latch<BranchData>::Output inp;
199 Latch<BranchData>::Output prediction;
325 void changeStream(const BranchData &branch);
330 void updateExpectedSeqNums(const BranchData &branch);
388 Latch<BranchData>::Output inp_,
390 Latch<BranchData>::Output prediction_,
|
| H A D | execute.cc | 66 Latch<BranchData>::Input out_) :
216 Execute::tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch)
240 BranchData::Reason reason = BranchData::NoBranch;
260 reason = BranchData::BadlyPredictedBranch;
270 reason = BranchData::CorrectlyPredictedBranch;
278 reason = BranchData::BadlyPredictedBranchTarget;
285 reason = BranchData::UnpredictedBranch;
288 reason = BranchData::NoBranch;
297 BranchData
[all...] |
| H A D | fetch1.cc | 58 Latch<BranchData>::Output inp_,
60 Latch<BranchData>::Output prediction_,
489 Fetch1::changeStream(const BranchData &branch)
497 case BranchData::SuspendThread:
508 case BranchData::HaltFetch:
521 Fetch1::updateExpectedSeqNums(const BranchData &branch)
575 const BranchData &execute_branch = *inp.outputWire;
576 const BranchData &fetch2_branch = *prediction.outputWire;
|
Completed in 17 milliseconds