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/gem5/src/arch/mips/ | ||
H A D | isa.cc | diff 6806:45879b0e3240 Thu Dec 31 15:30:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg. The MIPS ISA object expects to be constructed with a CPU pointer it uses to look at other thread contexts and allow them to be manipulated with control registers. Unfortunately, that differs from all the other ISA classes and would complicate their implementation. This change makes the event constructor use a CPU pointer pulled out of the thread context passed to setMiscReg instead. |
H A D | isa.hh | diff 6806:45879b0e3240 Thu Dec 31 15:30:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg. The MIPS ISA object expects to be constructed with a CPU pointer it uses to look at other thread contexts and allow them to be manipulated with control registers. Unfortunately, that differs from all the other ISA classes and would complicate their implementation. This change makes the event constructor use a CPU pointer pulled out of the thread context passed to setMiscReg instead. |
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