Searched hist:2420 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/arm/isa/formats/ | ||
| H A D | sve_2nd_level.isa | diff 14107:2420e71b150d Tue Aug 14 09:27:00 EDT 2018 Adrià Armejach <adria.armejach@gmail.com> arch-arm: Fix decoding for SVE memory instructions Some SVE memory instructions are missing the makeSP function for register operands that can be the SP register. This leads to segmentation faults on the application side as the wrong register is decoded. Change-Id: Ic71abc845e0786a60d665231b5f7b024d2955f4b Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19169 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
| /gem5/src/sim/ | ||
| H A D | process.cc | diff 11920:fd3d65d70951 Sat Jan 28 19:22:00 EST 2017 Brandon Potter <Brandon.Potter@amd.com> syscall-emul: Hotfix for FreeBSD/Mac builds The clone system call added in 236719892 relies on header files from Linux systems. Obviously, this prevents compilation for anyone using FreeBSD or Mac to compile the simulator. This changeset is meant as a temporary fix to allow builds on non-Linux systems until a proper solution is found. Change-Id: I404cc41c588ed193dd2c1ca0c1aea35b0786fe4e Reviewed-on: https://gem5-review.googlesource.com/2420 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
Completed in 20 milliseconds