Searched hist:190 (Results 1 - 8 of 8) sorted by relevance
/gem5/src/mem/cache/prefetch/ | ||
H A D | indirect_memory.hh | 13772:31b71dadc472 Thu Mar 07 09:42:00 EST 2019 Javier Bueno <javier.bueno@metempsy.com> mem-cache: Added the Indirect Memory Prefetcher Reference: Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, and Srinivas Devadas. 2015. IMP: indirect memory prefetcher. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 178-190. DOI: https://doi.org/10.1145/2830772.2830807 Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16223 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
H A D | indirect_memory.cc | 13772:31b71dadc472 Thu Mar 07 09:42:00 EST 2019 Javier Bueno <javier.bueno@metempsy.com> mem-cache: Added the Indirect Memory Prefetcher Reference: Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, and Srinivas Devadas. 2015. IMP: indirect memory prefetcher. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 178-190. DOI: https://doi.org/10.1145/2830772.2830807 Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16223 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
H A D | SConscript | diff 13772:31b71dadc472 Thu Mar 07 09:42:00 EST 2019 Javier Bueno <javier.bueno@metempsy.com> mem-cache: Added the Indirect Memory Prefetcher Reference: Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, and Srinivas Devadas. 2015. IMP: indirect memory prefetcher. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 178-190. DOI: https://doi.org/10.1145/2830772.2830807 Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16223 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
H A D | Prefetcher.py | diff 13772:31b71dadc472 Thu Mar 07 09:42:00 EST 2019 Javier Bueno <javier.bueno@metempsy.com> mem-cache: Added the Indirect Memory Prefetcher Reference: Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, and Srinivas Devadas. 2015. IMP: indirect memory prefetcher. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 178-190. DOI: https://doi.org/10.1145/2830772.2830807 Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16223 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
/gem5/util/pbs/ | ||
H A D | pbs.py | 1376:190de61fed5a Sat Feb 05 13:49:00 EST 2005 Nathan Binkert <binkertn@umich.edu> Make pbs submission scripts available to all. Fix up configuration scrupts to have better support for running on the simulation pool. |
H A D | job.py | 1376:190de61fed5a Sat Feb 05 13:49:00 EST 2005 Nathan Binkert <binkertn@umich.edu> Make pbs submission scripts available to all. Fix up configuration scrupts to have better support for running on the simulation pool. |
H A D | send.py | 1376:190de61fed5a Sat Feb 05 13:49:00 EST 2005 Nathan Binkert <binkertn@umich.edu> Make pbs submission scripts available to all. Fix up configuration scrupts to have better support for running on the simulation pool. |
/gem5/src/base/ | ||
H A D | addr_range.hh | diff 9412:190fd0e285f6 Mon Jan 07 13:05:00 EST 2013 Andreas Hansson <andreas.hansson@arm.com> base: Add support for merging of interleaved address ranges This patch adds support for merging a vector of interleaved address ranges into a contigous range. The functionality will be used in the interconnect and the PhysicalMemory to transform interleaved memory ranges to contigous ranges before passing them on. The actual use of the merging is appearing in future patches. |
Completed in 38 milliseconds