Searched hist:14228 (Results 1 - 1 of 1) sorted by relevance
| /gem5/src/arch/arm/ | ||
| H A D | isa.cc | diff 14228:8c1143372c76 Tue Aug 20 05:48:00 EDT 2019 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC regs The readMiscReg/setMiscReg methods were not forwarding register reads/writes to the cpu interface when in AArch32. Change-Id: Ide983e793b8033a88d31fe6ea87eaeffe9b093f5 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20611 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
Completed in 17 milliseconds