Searched hist:12944 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v2.hhdiff 13108:8e46a4e10f94 Mon Sep 03 10:43:00 EDT 2018 Adrien Pesle <adrien.pesle@arm.com> dev-arm: Add basic support for level sensitive SPIs in GICv2

For level sensitive interrupt IRQ line must be cleared when interrupt is
deasserted. This is not the case for edge-trigerred interrupt.

Change-Id: Ib1660da74a296750c0eb9e20878d4ee64bd23130
Reviewed-on: https://gem5-review.googlesource.com/12944
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Dgic_v2.ccdiff 13108:8e46a4e10f94 Mon Sep 03 10:43:00 EDT 2018 Adrien Pesle <adrien.pesle@arm.com> dev-arm: Add basic support for level sensitive SPIs in GICv2

For level sensitive interrupt IRQ line must be cleared when interrupt is
deasserted. This is not the case for edge-trigerred interrupt.

Change-Id: Ib1660da74a296750c0eb9e20878d4ee64bd23130
Reviewed-on: https://gem5-review.googlesource.com/12944
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/systemc/ext/core/
H A Dsc_port.hhdiff 12944:3909a6e6fa6e Mon Jun 18 21:51:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add the "implementation defined" vport function.

This function is in an "implementation defined" class body in the spec,
and has a comment next to it which says "(for internal use only)" next
to it, but it is still used directly in one of the tests.

Change-Id: Ib3727c93cc531ddd31a24897291dc7e7c97c2b58
Reviewed-on: https://gem5-review.googlesource.com/11354
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

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