Searched hist:10541 (Results 1 - 2 of 2) sorted by relevance
/gem5/src/arch/x86/isa/microops/ | ||
H A D | mediaop.isa | diff 12707:7819f067a128 Wed May 23 19:47:00 EDT 2018 Gabe Black <gabeblack@google.com> x86: Add op classes to the MediaOps. The ISA parser had been assuming these microops were all FloatAddOp which is usually not correct. Change-Id: Ic54881d16f16b50c3d6a8c74b94bff9ae3b1f43e Reviewed-on: https://gem5-review.googlesource.com/10541 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Tariq Azmy <tariqslayer01@gmail.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
/gem5/src/arch/x86/ | ||
H A D | interrupts.hh | diff 10541:9f100bac04f1 Mon Nov 17 03:17:00 EST 2014 Gabe Black <gabeblack@google.com> x86: APIC: Fix the getRegArrayBit function. The getRegArrayBit function extracts a bit from a series of registers which are treated as a single large bit array. A previous change had modified the logic which figured out which bit to extract from ">> 5" to "% 5" which seems wrong, especially when other, similar functions were changed to use "% 32". |
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