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/gem5/src/cpu/simple/
H A DBaseSimpleCPU.pydiff 10061:3b0d0c988ed6 Sun Feb 09 14:49:00 EST 2014 Andreas Sandberg <andreas@sandberg.pp.se> cpu: simple: Add support for using branch predictors

This changesets adds branch predictor support to the
BaseSimpleCPU. The simple CPUs normally don't need a branch predictor,
however, there are at least two cases where it can be desirable:

1) A simple CPU can be used to warm the branch predictor of an O3
CPU before switching to the slower O3 model.

2) The simple CPU can be used as a quick way of evaluating/debugging
new branch predictors since it exposes branch predictor
statistics.

Limitations:
* Since the simple CPU doesn't speculate, only one instruction will
be active in the branch predictor at a time (i.e., the branch
predictor will never see speculative branches).

* The outcome of a branch prediction does not affect the performance
of the simple CPU.
H A Dbase.hhdiff 10061:3b0d0c988ed6 Sun Feb 09 14:49:00 EST 2014 Andreas Sandberg <andreas@sandberg.pp.se> cpu: simple: Add support for using branch predictors

This changesets adds branch predictor support to the
BaseSimpleCPU. The simple CPUs normally don't need a branch predictor,
however, there are at least two cases where it can be desirable:

1) A simple CPU can be used to warm the branch predictor of an O3
CPU before switching to the slower O3 model.

2) The simple CPU can be used as a quick way of evaluating/debugging
new branch predictors since it exposes branch predictor
statistics.

Limitations:
* Since the simple CPU doesn't speculate, only one instruction will
be active in the branch predictor at a time (i.e., the branch
predictor will never see speculative branches).

* The outcome of a branch prediction does not affect the performance
of the simple CPU.
H A Dbase.ccdiff 10061:3b0d0c988ed6 Sun Feb 09 14:49:00 EST 2014 Andreas Sandberg <andreas@sandberg.pp.se> cpu: simple: Add support for using branch predictors

This changesets adds branch predictor support to the
BaseSimpleCPU. The simple CPUs normally don't need a branch predictor,
however, there are at least two cases where it can be desirable:

1) A simple CPU can be used to warm the branch predictor of an O3
CPU before switching to the slower O3 model.

2) The simple CPU can be used as a quick way of evaluating/debugging
new branch predictors since it exposes branch predictor
statistics.

Limitations:
* Since the simple CPU doesn't speculate, only one instruction will
be active in the branch predictor at a time (i.e., the branch
predictor will never see speculative branches).

* The outcome of a branch prediction does not affect the performance
of the simple CPU.
/gem5/src/arch/arm/isa/formats/
H A Daarch64.isadiff 12673:b862f22eeed9 Wed Apr 18 05:31:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Change disassemble when MSR to UNKNOWN register

This patch changes the fault being thrown when MSR/MRS to an unknown
Misc register in AArch64. While previously the instruction was decoded
as an Unknown instruction (hence not printing any information), it is
now decoded as a FailUnimplemented and the unrecognized System register
numbers (CRn, op0...) are printed.

Change-Id: I205ff7adcde5934231c77e8d2250db69a34581fc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10061
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

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