Searched refs:tXP (Results 1 - 4 of 4) sorted by relevance

/gem5/src/mem/
H A DDRAMCtrl.py231 tXP = Param.Latency("0ns", "Power-up Delay") variable in class:DRAMCtrl
387 tXP = '6ns' variable in class:DDR3_1600_8x8
624 tXP = '6ns' variable in class:DDR4_2400_16x4
775 tXP = '7.5ns' variable in class:LPDDR2_S4_1066_1x32
943 tXP = '7.5ns' variable in class:LPDDR3_1600_1x32
1150 tXP = '8ns' variable in class:HBM_1000_4H_1x128
1152 # start with tRFC + tXP -> 160ns + 8ns = 168ns
1191 # start with tRFC + tXP -> 160ns + 8ns = 168ns
1198 tXP = '10ns' variable in class:HBM_1000_4H_1x64
H A Ddrampower.cc92 timingSpec.XP = divCeil(p->tXP, p->tCK);
H A Ddram_ctrl.hh1004 const Tick tXP; member in class:DRAMCtrl
H A Ddram_ctrl.cc90 tRRD_L(p->tRRD_L), tXAW(p->tXAW), tXP(p->tXP), tXS(p->tXS),
1116 rank.scheduleWakeUpEvent(tXP);
1930 scheduleWakeUpEvent(memory.tXP);
2304 // exiting PRE PD, will be in IDLE until tXP expires
2307 schedulePowerEvent(PWR_REF, curTick() + memory.tXP);

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