Searched refs:successful (Results 1 - 9 of 9) sorted by relevance

/gem5/src/sim/
H A Dsyscall_return.hh43 * errno value. Otherwise, the call was successful and the integer is
45 * successful to allow syscalls to return pointers to high memory,
80 /// Was the system call successful?
81 bool successful() const function in class:SyscallReturn
92 assert(successful());
99 assert(!successful());
/gem5/src/mem/
H A Daddr_mapper.cc120 bool successful = masterPort.sendTimingReq(pkt); local
122 // If not successful, restore the address and sender state
123 if (!successful) {
131 return successful;
152 bool successful = slavePort.sendTimingResp(pkt); local
156 if (successful) {
164 return successful;
H A Dmem_checker_monitor.cc171 bool successful = masterPort.sendTimingReq(pkt); local
173 // If not successful, restore the sender state
174 if (!successful && expects_response && (is_read || is_write)) {
178 if (successful && expects_response) {
187 // the masterPort may not be successful in executing sendTimingReq,
191 // Once we know that sendTimingReq was successful, we can set the
217 } else if (successful) {
223 return successful;
263 bool successful = slavePort.sendTimingResp(pkt); local
267 if (successful) {
[all...]
H A Dcomm_monitor.cc393 bool successful = masterPort.sendTimingReq(pkt); local
395 // If not successful, restore the sender state
396 if (!successful && expects_response && !stats.disableLatencyHists) {
400 if (successful) {
404 if (successful) {
409 return successful;
436 bool successful = slavePort.sendTimingResp(pkt); local
441 if (successful) {
452 if (successful) {
458 return successful;
[all...]
/gem5/src/arch/mips/
H A Dprocess.cc218 if (sysret.successful()) {
/gem5/src/arch/power/
H A Dprocess.cc294 if (sysret.successful()) {
/gem5/src/arch/riscv/
H A Dprocess.cc275 if (sysret.successful()) {
/gem5/src/arch/alpha/
H A Dprocess.cc244 if (sysret.successful()) {
/gem5/src/arch/sparc/
H A Dprocess.cc540 if (sysret.successful()) {

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