Searched refs:reg0 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmult.hh54 IntRegIndex reg0, reg1, reg2; member in class:ArmISA::Mult3
59 reg0(_reg0), reg1(_reg1), reg2(_reg2)
/gem5/src/gpu-compute/
H A Dgpu_dyn_inst.hh367 makeAtomicOpFunctor(c0 *reg0, c0 *reg1) argument
370 return new AtomicOpAnd<c0>(*reg0);
372 return new AtomicOpOr<c0>(*reg0);
374 return new AtomicOpXor<c0>(*reg0);
376 return new AtomicOpCAS<c0>(*reg0, *reg1, cu);
378 return new AtomicOpExch<c0>(*reg0);
380 return new AtomicOpAdd<c0>(*reg0);
382 return new AtomicOpSub<c0>(*reg0);
388 return new AtomicOpMax<c0>(*reg0);
390 return new AtomicOpMin<c0>(*reg0);
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