Searched refs:outerAttrs (Results 1 - 4 of 4) sorted by relevance
/gem5/src/arch/arm/ |
H A D | stage2_lookup.cc | 140 if (stage2Te->outerAttrs == 0 || 141 stage1Te.outerAttrs == 0) { 143 stage1Te.outerAttrs = 0; 144 } else if (stage2Te->outerAttrs == 2 || 145 stage1Te.outerAttrs == 2) { 147 stage1Te.outerAttrs = 2; 150 stage1Te.outerAttrs = 3; 156 stage1Te.outerAttrs == 0) {
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H A D | pagetable.hh | 117 uint8_t outerAttrs; member in struct:ArmISA::TlbEntry 154 innerAttrs(0), outerAttrs(0), ap(read_only ? 0x3 : 0), hap(0x3), 169 vmid(0), N(0), innerAttrs(0), outerAttrs(0), ap(0), hap(0x3), 267 (outerAttrs << 2); 313 SERIALIZE_SCALAR(outerAttrs); variable 343 UNSERIALIZE_SCALAR(outerAttrs); variable
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H A D | table_walker.cc | 1040 te.outerAttrs = 0; 1047 te.outerAttrs = 0; 1053 te.outerAttrs = bits(texcb, 1, 0); 1059 te.outerAttrs = bits(texcb, 1, 0); 1066 te.outerAttrs = bits(texcb, 1, 0); 1078 te.outerAttrs = 1; 1085 te.outerAttrs = 0; 1096 te.outerAttrs = bits(texcb, 3, 2); 1162 te.outerAttrs = 0; 1171 te.outerAttrs [all...] |
H A D | tlb.cc | 1116 temp_te.outerAttrs = 0x0; 1122 temp_te.outerAttrs = 0x3; 1128 "%d, innerAttrs: %d, outerAttrs: %d, isStage2: %d\n", 1129 temp_te.shareable, temp_te.innerAttrs, temp_te.outerAttrs, 1153 "outerAttrs: %d, mtype: %d, isStage2: %d\n", 1154 te->shareable, te->innerAttrs, te->outerAttrs,
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