Searched refs:offs (Results 1 - 6 of 6) sorted by relevance
/gem5/src/gpu-compute/ |
H A D | brig_object.hh | 83 const uint8_t *getSectionOffset(enum SectionIndex sec, int offs) const; 100 const char* getString(int offs) const; 101 const Brig::BrigData* getBrigBaseData(int offs) const; 102 const uint8_t* getData(int offs) const; 103 const Brig::BrigBase* getCodeSectionEntry(int offs) const; 104 const Brig::BrigOperand* getOperand(int offs) const; 105 unsigned getOperandPtr(int offs, int index) const; 106 const Brig::BrigInstBase* getInst(int offs) const;
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H A D | brig_object.cc | 83 BrigObject::getSectionOffset(enum SectionIndex sec, int offs) const 85 // allow offs == size for dummy end pointers 86 assert(offs <= sectionInfo[sec].size); 88 return sectionInfo[sec].ptr + offs; 92 BrigObject::getString(int offs) const 94 return (const char*)(getSectionOffset(DataSectionIndex, offs) + 4); 98 BrigObject::getCodeSectionEntry(int offs) const 100 return (const BrigBase*)getSectionOffset(CodeSectionIndex, offs); 104 BrigObject::getBrigBaseData(int offs) const 106 return (Brig::BrigData*)(getSectionOffset(DataSectionIndex, offs)); 122 getOperandPtr(int offs, int index) const argument [all...] |
/gem5/src/dev/pci/ |
H A D | device.hh | 148 * @retval offs The offset from the base address, 153 getBAR(Addr addr, int &bar, Addr &offs) argument 159 offs = addr - BARAddrs[b];
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/gem5/src/dev/arm/ |
H A D | smmu_v3.hh | 150 bool inSecureBlock(uint32_t offs) const;
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H A D | smmu_v3.cc | 710 SMMUv3::inSecureBlock(uint32_t offs) const 712 if (offs >= offsetof(SMMURegs, _secure_regs) && offs < SMMU_SECURE_SZ)
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/gem5/src/sim/ |
H A D | syscall_emul.cc | 317 uint64_t offs = p->getSyscallArg(tc, index); local 325 off_t result = lseek(sim_fd, offs, whence);
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