| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/ |
| H A D | lw.S | 4 # lw.S
7 # Test lw instruction.
20 TEST_LD_OP( 2, lw, 0x0000000000ff00ff, 0, tdat );
21 TEST_LD_OP( 3, lw, 0xffffffffff00ff00, 4, tdat );
22 TEST_LD_OP( 4, lw, 0x000000000ff00ff0, 8, tdat );
23 TEST_LD_OP( 5, lw, 0xfffffffff00ff00f, 12, tdat );
27 TEST_LD_OP( 6, lw, 0x0000000000ff00ff, -12, tdat4 );
28 TEST_LD_OP( 7, lw, 0xffffffffff00ff00, -8, tdat4 );
29 TEST_LD_OP( 8, lw, 0x000000000ff00ff0, -4, tdat4 );
30 TEST_LD_OP( 9, lw,
[all...] |
| H A D | sw.S | 20 TEST_ST_OP( 2, lw, sw, 0x0000000000aa00aa, 0, tdat );
21 TEST_ST_OP( 3, lw, sw, 0xffffffffaa00aa00, 4, tdat );
22 TEST_ST_OP( 4, lw, sw, 0x000000000aa00aa0, 8, tdat );
23 TEST_ST_OP( 5, lw, sw, 0xffffffffa00aa00a, 12, tdat );
27 TEST_ST_OP( 6, lw, sw, 0x0000000000aa00aa, -12, tdat8 );
28 TEST_ST_OP( 7, lw, sw, 0xffffffffaa00aa00, -8, tdat8 );
29 TEST_ST_OP( 8, lw, sw, 0x000000000aa00aa0, -4, tdat8 );
30 TEST_ST_OP( 9, lw, sw, 0xffffffffa00aa00a, 0, tdat8 );
39 lw x5, 0(x1); \
50 lw x
[all...] |
| H A D | sh.S | 22 TEST_ST_OP( 4, lw, sh, 0xffffffffbeef0aa0, 4, tdat );
|
| /gem5/ext/systemc/src/sysc/qt/md/ |
| H A D | mips-irix5.s | 84 lw $31,36+16($sp) /* Restore callee-save regs... */
85 lw $30,32+16($sp)
86 lw $23,28+16($sp)
87 lw $22,24+16($sp)
88 lw $21,20+16($sp)
89 lw $20,16+16($sp)
90 lw $19,12+16($sp)
91 lw $18, 8+16($sp)
92 lw $17, 4+16($sp)
93 lw
[all...] |
| H A D | mips.s | 72 lw $31,36+16($sp) /* Restore callee-save regs... */
73 lw $30,32+16($sp)
74 lw $23,28+16($sp)
75 lw $22,24+16($sp)
76 lw $21,20+16($sp)
77 lw $20,16+16($sp)
78 lw $19,12+16($sp)
79 lw $18, 8+16($sp)
80 lw $17, 4+16($sp)
81 lw
[all...] |
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ua/ |
| H A D | amoadd_w.S | 24 TEST_CASE(3, a5, 0x000000007ffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xfffffffffffff800, lw a5, 0(a3))
|
| H A D | amoand_w.S | 24 TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xffffffff80000000, lw a5, 0(a3))
|
| H A D | amomax_w.S | 24 TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 1, lw a5, 0(a3))
|
| H A D | amomaxu_w.S | 24 TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xffffffffffffffff, lw a5, 0(a3))
|
| H A D | amomin_w.S | 24 TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xffffffffffffffff, lw a5, 0(a3))
|
| H A D | amominu_w.S | 24 TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0, lw a5, 0(a3))
|
| H A D | amoor_w.S | 24 TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xfffffffffffff801, lw a5, 0(a3))
|
| H A D | amoswap_w.S | 24 TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xffffffff80000000, lw a5, 0(a3))
|
| H A D | amoxor_w.S | 24 TEST_CASE(3, a5, 0x7ffff800, lw a5, 0(a3))
32 TEST_CASE(5, a5, 0xffffffffbffff801, lw a5, 0(a3))
|
| H A D | lrsc.S | 25 1: lw a1, (a0)
60 1: lw a1, (a0)
66 lw a0, foo; \
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/ |
| H A D | breakpoint.S | 45 lw a0, (a2)
60 lw a2, (a2)
82 lw a2, (a2)
104 lw a3, (a3)
112 lw a2, (a2)
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64si/ |
| H A D | dirty.S | 39 lw t0, dummy - DRAM_BASE
46 lw t0, dummy - DRAM_BASE
54 lw t0, page_table_1
65 lw a0, page_table_1 - DRAM_BASE
86 lw t0, page_table_1
100 lw t0, page_table_1
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ud/ |
| H A D | fcvt.S | 62 lw a0, 0(a1);
63 lw a1, 4(a1)
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/macros/scalar/ |
| H A D | test_macros.h | 389 lw a3, 12(a0); \
434 lw a3, 24(a0); \
435 lw t1, 28(a0); \
453 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fsd f3, 0(a0); lw t2, 4(a0); lw a0, 0(a0))
469 inst f3, f0; fsd f3, 0(a0); lw t2, 4(a0); lw a0, 0(a0))
482 inst f3, f0; fsd f3, 0(a0); lw t2, 4(a0); lw a0, 0(a0))
495 inst f3, f0, f1; fsd f3, 0(a0); lw t
[all...] |
| /gem5/tests/test-progs/insttest/src/riscv/ |
| H A D | rv64c.cpp | 44 uint64_t lw = 0, lwsp = -1;
46 asm volatile("lw %0,%2(sp);"
48 : "=r" (lw), "=r" (lwsp)
50 return lw == lwsp;
80 "lw %0,8(sp);"
117 "c.lw, positive");
120 "c.lw, negative");
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uamt/ |
| H A D | amoswap_d.S | 85 lw t3, (t2) // load the var's value
|
| H A D | lrsc_d.S | 87 lw t3, (t2) // load the var's value
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uc/ |
| H A D | rvc.S | 42 RVC_TEST_CASE (6, a2, 0xfffffffffedcba99, c.lw a0, 4(a1); addi a0, a0, 1; c.sw a0, 4(a1); c.lw a2, 4(a1))
|
| /gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/ |
| H A D | std_ulogic_datatype.cpp | 349 std_ulogic lu, lx, l0, l1, lz, lw, ll, lh, ld; local
388 l1 = v7 & v4; lz = v7 & v5; lw = v7 & v6;
441 l1 = v7 | v4; lz = v7 | v5; lw = v7 | v6;
494 l1 = v7 ^ v4; lz = v7 ^ v5; lw = v7 ^ v6;
|
| /gem5/tests/test-progs/asmtest/src/riscv/env/v/ |
| H A D | entry.S | 9 # define LOAD lw
|