Searched refs:lineSnap (Results 1 - 2 of 2) sorted by relevance

/gem5/src/cpu/minor/
H A Dfetch1.cc69 lineSnap(params.fetch1LineSnapWidth),
81 if (lineSnap == 0) {
82 lineSnap = cpu.cacheLineSize();
83 DPRINTF(Fetch, "lineSnap set to cache line size of: %d\n",
84 lineSnap);
94 if ((lineSnap % sizeof(TheISA::MachInst)) != 0) {
100 if (!(maxLineWidth >= lineSnap &&
106 name_, sizeof(TheISA::MachInst), lineSnap);
156 Addr aligned_pc = thread.pc.instAddr() & ~((Addr) lineSnap - 1);
157 unsigned int line_offset = aligned_pc % lineSnap;
[all...]
H A Dfetch1.hh211 unsigned int lineSnap; member in class:Minor::Fetch1
213 /** Maximum fetch width in bytes. Setting this (and lineSnap) to the
216 * single instructions (except near the end of lineSnap lines) */

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