Searched refs:innerAttrs (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/arch/arm/ |
| H A D | stage2_lookup.cc | 127 if (stage2Te->innerAttrs == 0 ||
128 stage1Te.innerAttrs == 0) {
130 stage1Te.innerAttrs = 0;
131 } else if (stage2Te->innerAttrs == 2 ||
132 stage1Te.innerAttrs == 2) {
134 stage1Te.innerAttrs = 2;
137 stage1Te.innerAttrs = 3;
155 if (stage1Te.innerAttrs == 0 &&
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| H A D | pagetable.hh | 116 uint8_t innerAttrs; member in struct:ArmISA::TlbEntry
154 innerAttrs(0), outerAttrs(0), ap(read_only ? 0x3 : 0), hap(0x3),
169 vmid(0), N(0), innerAttrs(0), outerAttrs(0), ap(0), hap(0x3),
266 (innerAttrs << 4) |
312 SERIALIZE_SCALAR(innerAttrs); variable
342 UNSERIALIZE_SCALAR(innerAttrs); variable
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| H A D | table_walker.cc | 1039 te.innerAttrs = 1;
1046 te.innerAttrs = 3;
1052 te.innerAttrs = 6;
1058 te.innerAttrs = 7;
1065 te.innerAttrs = 0;
1077 te.innerAttrs = 5;
1084 te.innerAttrs = 3;
1095 te.innerAttrs = bits(texcb, 1, 0);
1161 te.innerAttrs = 1;
1170 te.innerAttrs
[all...] |
| H A D | tlb.cc | 1115 temp_te.innerAttrs = 0x0;
1121 temp_te.innerAttrs = 0x3;
1128 "%d, innerAttrs: %d, outerAttrs: %d, isStage2: %d\n",
1129 temp_te.shareable, temp_te.innerAttrs, temp_te.outerAttrs,
1152 "Setting memory attributes: shareable: %d, innerAttrs: %d, "
1154 te->shareable, te->innerAttrs, te->outerAttrs,
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Completed in 16 milliseconds