Searched refs:gs (Results 1 - 8 of 8) sorted by relevance

/gem5/ext/libelf/
H A Dgelf_sym.c96 gelf_update_sym(Elf_Data *d, int ndx, GElf_Sym *gs) argument
106 if (d == NULL || ndx < 0 || gs == NULL ||
137 sym32->st_name = gs->st_name;
138 sym32->st_info = gs->st_info;
139 sym32->st_other = gs->st_other;
140 sym32->st_shndx = gs->st_shndx;
142 LIBELF_COPY_U32(sym32, gs, st_value);
143 LIBELF_COPY_U32(sym32, gs, st_size);
147 *sym64 = *gs;
H A Dgelf_symshndx.c83 gelf_update_symshndx(Elf_Data *d, Elf_Data *id, int ndx, GElf_Sym *gs, argument
92 if (gelf_update_sym(d, ndx, gs) == 0)
/gem5/src/arch/x86/
H A Dremote_gdb.hh81 uint32_t gs; member in struct:X86ISA::RemoteGDB::X86GdbRegCache::__anon11
123 uint32_t gs; member in struct:X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED
H A Dremote_gdb.cc134 r.gs = context->readMiscRegNoEffect(MISCREG_GS);
156 r.gs = context->readMiscRegNoEffect(MISCREG_GS);
191 if (r.gs != context->readMiscRegNoEffect(MISCREG_GS))
219 if (r.gs != context->readMiscRegNoEffect(MISCREG_GS))
/gem5/src/arch/mips/
H A Dmt_constants.hh51 Bitfield<28> gs; member in namespace:MipsISA
/gem5/util/statetrace/arch/amd64/
H A Dtracechild.cc112 case GS: return myregs.gs;
338 byte == 0x65 || //gs
/gem5/ext/ply/ply/
H A Dyacc.py2015 gs = [ ]
2023 gs.append(n)
2027 if gs:
2028 g = self.lr0_closure(gs)
2031 s['$end'] = gs
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc151 APPLY_SEGMENT(gs, MISCREG_GS - MISCREG_SEG_SEL_BASE); \
781 forceSegAccessed(sregs.gs);

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