Searched refs:_owner (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/mem/ |
| H A D | tport.cc | 48 SimObject* _owner) :
49 QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this)
47 SimpleTimingPort(const std::string& _name, SimObject* _owner) argument
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| H A D | port.cc | 57 MasterPort::MasterPort(const std::string& name, SimObject* _owner, PortID _id) argument
58 : Port(name, _id), _slavePort(NULL), owner(*_owner)
114 SlavePort::SlavePort(const std::string& name, SimObject* _owner, PortID id) argument
116 owner(*_owner)
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| H A D | port.hh | 87 MasterPort(const std::string& name, SimObject* _owner,
271 SlavePort(const std::string& name, SimObject* _owner,
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| /gem5/ext/systemc/src/tlm_utils/ |
| H A D | peq_with_cb_and_phase.h | 195 peq_with_cb_and_phase(OWNER* _owner, cb _cb) argument
197 ,m_owner(_owner)
208 peq_with_cb_and_phase(const char* _name, OWNER* _owner,cb _cb) argument
210 ,m_owner(_owner)
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| /gem5/src/systemc/ext/tlm_utils/ |
| H A D | peq_with_cb_and_phase.h | 178 peq_with_cb_and_phase(OWNER *_owner, cb _cb) : argument
181 m_owner(_owner), m_cb(_cb)
191 peq_with_cb_and_phase(const char *_name, OWNER *_owner, cb _cb) : argument
192 sc_core::sc_object(_name), m_owner(_owner), m_cb(_cb)
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| /gem5/src/cpu/trace/ |
| H A D | trace_cpu.hh | 429 FixedRetryGen(TraceCPU& _owner, const std::string& _name, argument
432 : owner(_owner),
856 ElasticDataGen(TraceCPU& _owner, const std::string& _name, argument
859 : owner(_owner),
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| /gem5/src/sim/ |
| H A D | system.hh | 100 SystemPort(const std::string &_name, SimObject *_owner) argument
101 : MasterPort(_name, _owner)
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