Searched refs:RequestIssuing (Results 1 - 4 of 4) sorted by relevance

/gem5/src/cpu/minor/
H A Dfetch1.hh91 * memory system and the transfers queue (state becomes RequestIssuing).
117 RequestIssuing, /* Issued to memory, must wait for response */ enumerator in enum:Minor::Fetch1::FetchRequest::FetchRequestState
H A Dlsq.cc221 case LSQ::LSQRequest::RequestIssuing:
222 os << "RequestIssuing";
974 request->state == LSQRequest::RequestIssuing ||
1205 request->setState(LSQRequest::RequestIssuing);
1217 case LSQRequest::RequestIssuing:
1220 request->setState(LSQRequest::RequestIssuing);
1243 case LSQRequest::RequestIssuing:
1305 case LSQRequest::RequestIssuing:
1377 case LSQRequest::RequestIssuing:
H A Dfetch1.cc340 request->state = FetchRequest::RequestIssuing;
756 return state != InTranslation && state != RequestIssuing &&
H A Dlsq.hh169 RequestIssuing, /* Load/store issued to memory in the requests enumerator in enum:Minor::LSQ::LSQRequest::LSQRequestState

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