Searched refs:ROB (Results 1 - 11 of 11) sorted by relevance

/gem5/src/cpu/o3/
H A Drob.cc36 template class ROB<O3CPUImpl>;
H A Drob_impl.hh52 #include "debug/ROB.hh"
58 ROB<Impl>::ROB(O3CPU *_cpu, DerivO3CPUParams *params) function in class:ROB
68 //Set Max Entries to Total ROB Capacity
74 DPRINTF(Fetch, "ROB sharing policy set to Partitioned\n");
79 //Divide ROB up evenly
85 DPRINTF(Fetch, "ROB sharing policy set to Threshold\n");
104 ROB<Impl>::resetState()
114 // Initialize the "universal" ROB head & tail point to invalid
122 ROB<Imp
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H A Dcpu_policy.hh67 /** Typedef for the ROB. */
68 typedef ::ROB<Impl> ROB; typedef in struct:SimpleCPUPolicy
H A Drob.hh59 * ROB class. The ROB is largely what drives squashing.
62 class ROB class
72 /** Possible ROB statuses. */
80 /** Per-thread ROB status. */
83 /** ROB resource sharing policy for SMT mode. */
87 /** ROB constructor.
89 * @param params The cpu params including several ROB-specific parameters.
91 ROB(O3CPU *_cpu, DerivO3CPUParams *params);
106 /** Function to insert an instruction into the ROB
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H A Dcommit.hh66 * the head of the ROB before they are ready to execute; once they
76 * be in the ROB. This is done by tracking the sequence number of the
77 * youngest instruction in the ROB, which gets updated to any
80 * supports multiple cycle squashing, to model a ROB that can only
93 typedef typename CPUPol::ROB ROB; typedef in class:DefaultCommit
184 /** Sets pointer to the ROB. */
185 void setROB(ROB *rob_ptr);
215 * to the ROB and tries to commit instructions.
219 /** Returns the number of free ROB entrie
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H A Drename.hh65 * ROB, IQ, or LSQ is going to be full. Rename also handles barriers,
66 * and does so by stalling on the instruction until the ROB is empty
67 * and there are no instructions in flight to the ROB.
263 /** Calculates the number of free ROB entries for a specific thread. */
374 * and ROB, but are not yet included in their occupancy counts.
379 * and ROB, but are not yet included in their occupancy counts.
384 * and ROB, but are not yet included in their occupancy counts.
408 /** Records if the ROB is empty. In SMT mode the ROB may be dynamically
409 * partitioned between threads, so the ROB mus
474 ROB, enumerator in enum:DefaultRename::FullSource
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H A Dcpu.hh516 /** Remove all instructions that are not currently in the ROB.
590 typename CPUPolicy::ROB rob;
H A Drename_impl.hh138 .desc("Number of times rename has blocked due to ROB full")
576 FullSource source = ROB;
586 "[tid:%i] Blocking due to no free ROB/IQ/ entries.\n"
587 "ROB has %i free entries.\n"
603 "but only %i insts can be renamed due to ROB/IQ/LSQ limits.\n",
630 // ROB already empty; no need to serialize.
646 //For all kind of instructions, check ROB and IQ first
716 // serializeBefore makes the instruction wait in rename until the ROB
971 // but the ROB may still be squashing instructions.
1273 DPRINTF(Rename,"[tid:%i] Stall: ROB ha
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H A Dcommit_impl.hh290 // Setup wire to read data from IEW (for the ROB).
300 // Setup wire to get instructions from rename (for the ROB).
310 // Setup wire to get instructions from rename (for the ROB).
348 DefaultCommit<Impl>::setROB(ROB *rob_ptr)
474 // reset ROB changed variable
566 // number as the youngest instruction in the ROB (0 in this case.
581 // the ROB is in the process of squashing.
701 // The ROB has more instructions it can commit. Its next status
708 " ROB and ready to commit\n",
717 "%s is head of ROB an
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/gem5/ext/mcpat/
H A Dcore.cc507 fp_inst_window(NULL), ROB(NULL), int_instruction_selection(NULL),
720 * ROB.ROB size = inflight inst. ROB is unified for int and fp inst.
721 * One old approach is to combine the RAT and ROB as a huge CAM structure as in AMD K7.
723 * McPAT uses current implementation of ROB as circular buffer.
724 * ROB is written once when instruction is issued and read once when the instruction is committed. *
736 //in RS based OOO, ROB also contains value of destination reg
764 ROB = new ArrayST(xml_data, &interface_ip, "Reorder Buffer",
767 ROB
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H A Dcore.h140 ArrayST* ROB; member in class:SchedulerU

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