Searched refs:PSTATE (Results 1 - 10 of 10) sorted by relevance

/gem5/src/arch/sparc/
H A Dmiscregs.hh127 BitUnion16(PSTATE)
137 EndBitUnion(PSTATE)
H A Dremote_gdb.cc183 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
201 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
245 PSTATE pstate = context()->readMiscReg(MISCREG_PSTATE);
H A Dutility.hh60 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
H A Dinterrupts.hh140 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
197 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
H A Dprocess.cc167 PSTATE pstate = 0;
182 PSTATE pstate = 0;
539 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
H A Disa.hh77 PSTATE pstate; // Process State Register
H A Dfaults.cc290 // PSTATE.priv is set to 1 here. The manual says it should be 0, but
292 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
307 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
386 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
435 pstate.pef = 1; // PSTATE.pef = whether or not an fpu is present
443 // The manual says PSTATE.priv should be 0, but Legion leaves it alone
512 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
571 PSTATE pstate = 0;
H A Disa.cc46 static PSTATE
49 PSTATE mask = 0;
61 static const PSTATE PstateMask = buildPstateMask();
/gem5/util/statetrace/arch/sparc/
H A Dtracechild.hh66 FSR, FPRS, PC, NPC, Y, CWP, PSTATE, ASI, CCR, enumerator in enum:SparcTraceChild::RegNum
H A Dtracechild.cc157 case SparcTraceChild::PSTATE:

Completed in 19 milliseconds