Searched refs:PRV_U (Results 1 - 6 of 6) sorted by relevance

/gem5/src/arch/riscv/
H A Dfaults.cc69 if (pp == PRV_U &&
71 prv = PRV_U;
78 if (pp == PRV_U &&
80 prv = PRV_U;
87 case PRV_U:
H A Disa.hh60 PRV_U = 0, enumerator in enum:RiscvISA::PrivilegeMode
H A Dprocess.cc105 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U);
115 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U);
H A Dfaults.hh233 case PRV_U:
H A Disa.cc88 case PRV_U:
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h111 #define PRV_U 0 macro

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