Searched refs:MISCREG_TIME (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/riscv/ | ||
| H A D | isa.cc | 126 case MISCREG_TIME: 127 if (hpmCounterEnabled(MISCREG_TIME)) { |
| H A D | registers.hh | 147 MISCREG_TIME, enumerator in enum:RiscvISA::MiscRegIndex 451 {CSR_TIME, {"time", MISCREG_TIME}}, |
Completed in 8 milliseconds