Searched refs:MISCREG_MCG_CTL (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc47 MsrVal(0x17B, MISCREG_MCG_CTL),
H A Dmisc.hh155 MISCREG_MCG_CTL, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/arch/x86/
H A Dutility.cc129 tc->setMiscReg(MISCREG_MCG_CTL, 0);
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc316 regNum = MISCREG_MCG_CTL;

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