Searched refs:MISCREG_MC0_MISC (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc106 MsrVal(0x403, MISCREG_MC0_MISC),
H A Dmisc.hh236 MISCREG_MC0_MISC = MISCREG_MC_MISC_BASE, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc493 regNum = MISCREG_MC0_MISC;

Completed in 26 milliseconds