Searched refs:MISCREG_MC0_CTL (Results 1 - 3 of 3) sorted by relevance
| /gem5/src/arch/x86/regs/ | ||
| H A D | msr.cc | 82 MsrVal(0x400, MISCREG_MC0_CTL), |
| H A D | misc.hh | 203 MISCREG_MC0_CTL = MISCREG_MC_CTL_BASE, enumerator in enum:X86ISA::MiscRegIndex |
| /gem5/src/gpu-compute/ | ||
| H A D | gpu_tlb.cc | 421 regNum = MISCREG_MC0_CTL; |
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