Searched refs:MISCREG_MC0_ADDR (Results 1 - 3 of 3) sorted by relevance
| /gem5/src/arch/x86/regs/ | ||
| H A D | msr.cc | 98 MsrVal(0x402, MISCREG_MC0_ADDR), |
| H A D | misc.hh | 225 MISCREG_MC0_ADDR = MISCREG_MC_ADDR_BASE, enumerator in enum:X86ISA::MiscRegIndex |
| /gem5/src/gpu-compute/ | ||
| H A D | gpu_tlb.cc | 469 regNum = MISCREG_MC0_ADDR; |
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