Searched refs:MISCREG_DR7 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/x86/
H A Disa.cc112 regVal[MISCREG_DR7] = 1 << 10;
335 miscReg = MISCREG_DR7;
337 case MISCREG_DR7:
339 DR7 dr7 = regVal[MISCREG_DR7];
H A Dfaults.cc288 tc->setMiscReg(MISCREG_DR7, 0x0000000000000400ULL);
/gem5/src/arch/x86/regs/
H A Dmisc.hh133 MISCREG_DR7, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc142 APPLY_DREG(dr7, MISCREG_DR7); \

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