Searched refs:MISCREG_COMPARE (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/mips/ | ||
| H A D | interrupts.cc | 148 RegVal compare = tc->readMiscRegNoEffect(MISCREG_COMPARE); |
| H A D | registers.hh | 179 MISCREG_COMPARE = 88, //Bank 11: 88-95 enumerator in enum:MipsISA::MiscRegIndex |
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