Searched refs:ISR (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/dev/x86/ |
| H A D | i8259.cc | 43 IRR(0), ISR(0), IMR(0),
83 DPRINTF(I8259, "Reading ISR as %#x.\n", ISR);
84 pkt->setLE(ISR);
127 int line = findMsbSet(ISR);
169 DPRINTF(I8259, "Read %s.\n", readIRR ? "IRR" : "ISR");
245 ISR &= ~(1 << line);
255 if (bits(ISR, 7, line) == 0) {
322 ISR |= 1 << line;
338 SERIALIZE_SCALAR(ISR);
[all...] |
| H A D | i8259.hh | 59 uint8_t ISR; member in class:X86ISA::I8259
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| /gem5/src/dev/net/ |
| H A D | ns_gige_reg.h | 45 ISR = 0x10, enumerator in enum:DeviceRegisterAddress
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| H A D | ns_gige.cc | 238 case ISR:
535 case ISR: /* writing to the ISR has no effect */
536 panic("ISR is a read only register!\n");
774 "interrupt written to ISR: intr=%#x isr=%#x imr=%#x\n",
826 "interrupt cleared from ISR: intr=%x isr=%x imr=%x\n",
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