Searched refs:GPU_CONTROL_REG (Results 1 - 4 of 4) sorted by relevance

/gem5/ext/nomali/tests/
H A Dnomali_test_ints.c53 GPU_CONTROL_REG(GPU_IRQ_CLEAR),
56 E_NOMALI_BAIL(nomali_reg_write(h, GPU_CONTROL_REG(GPU_IRQ_MASK),
59 E_NOMALI_BAIL(nomali_reg_write(h, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT),
63 GPU_CONTROL_REG(GPU_IRQ_CLEAR),
75 E_NOMALI_BAIL(nomali_reg_write(h, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT),
89 GPU_CONTROL_REG(GPU_IRQ_CLEAR),
91 E_NOMALI_BAIL(nomali_reg_write(h, GPU_CONTROL_REG(GPU_IRQ_MASK),
93 E_NOMALI_BAIL(nomali_reg_write(h, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT),
101 GPU_CONTROL_REG(GPU_IRQ_CLEAR),
H A Dnomali_test0.c44 nomali_reg_read(h, &value, GPU_CONTROL_REG(GPU_ID)));
/gem5/src/dev/arm/
H A Dgpu_nomali.cc329 { GPU_CONTROL_REG(GPU_ID), p->gpu_id },
330 { GPU_CONTROL_REG(L2_FEATURES), p->l2_features },
331 { GPU_CONTROL_REG(TILER_FEATURES), p->tiler_features },
332 { GPU_CONTROL_REG(MEM_FEATURES), p->mem_features },
333 { GPU_CONTROL_REG(MMU_FEATURES), p->mmu_features },
334 { GPU_CONTROL_REG(AS_PRESENT), p->as_present },
335 { GPU_CONTROL_REG(JS_PRESENT), p->js_present },
337 { GPU_CONTROL_REG(THREAD_MAX_THREADS), p->thread_max_threads },
338 { GPU_CONTROL_REG(THREAD_MAX_WORKGROUP_SIZE),
340 { GPU_CONTROL_REG(THREAD_MAX_BARRIER_SIZ
[all...]
/gem5/ext/nomali/lib/
H A Dmali_midg_regmap.h26 #define GPU_CONTROL_REG(r) (GPU_CONTROL_BASE + (r)) macro
92 #define TEXTURE_FEATURES_REG(n) GPU_CONTROL_REG(TEXTURE_FEATURES_0 + ((n) << 2))
111 #define JS_FEATURES_REG(n) GPU_CONTROL_REG(JS0_FEATURES + ((n) << 2))

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