Searched refs:ExcCodeRI (Results 1 - 2 of 2) sorted by relevance
/gem5/src/arch/mips/ | ||
H A D | faults.cc | 55 { "Reserved Instruction Fault", 0x180, ExcCodeRI }; |
H A D | faults.hh | 64 ExcCodeRI = 10, enumerator in enum:MipsISA::ExcCode |
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