Searched refs:END_RESP (Results 1 - 22 of 22) sorted by relevance

/gem5/ext/systemc/src/tlm_core/tlm_2/tlm_generic_payload/
H A Dtlm_phase.h29 //enum tlm_phase { BEGIN_REQ, END_REQ, BEGIN_RESP, END_RESP };
31 enum tlm_phase_enum { UNINITIALIZED_PHASE=0, BEGIN_REQ=1, END_REQ, BEGIN_RESP, END_RESP }; enumerator in enum:tlm::tlm_phase_enum
34 static unsigned int number=END_RESP+1;
39 static std::vector<const char*> phase_name_vec(END_RESP+1, (const char*)NULL);
62 case END_RESP: s<<"END_RESP"; break;
/gem5/src/systemc/tlm_core/2/generic_payload/
H A Dphase.cc86 tlm_phase_registry() : names_(END_RESP + 1)
92 names_[END_RESP] = "END_RESP";
/gem5/util/tlm/examples/master_port/
H A Dtraffic_generator.cc117 } else if (phase == tlm::BEGIN_REQ || phase == tlm::END_RESP)
126 tlm::tlm_phase fw_phase = tlm::END_RESP;
/gem5/src/systemc/tests/include/
H A DSimpleATInitiator2.h230 phase = tlm::END_RESP;
236 case tlm::END_RESP: // fall-through
239 // If phase == END_RESP, nb_transport should have returned true
278 phase = tlm::END_RESP;
286 case tlm::END_RESP: // fall-through
H A DSimpleATInitiator1.h239 case tlm::END_RESP: // fall-through
242 // If phase == END_RESP, nb_transport should have returned true
287 case tlm::END_RESP: // fall-through
299 phase_type phase = tlm::END_RESP;
H A DExplicitATTarget.h97 } else if (phase == tlm::END_RESP) {
137 // Initiator will call nb_transport(trans, END_RESP, t)
H A DSimpleATTarget1.h110 } else if (phase == tlm::END_RESP) {
H A DSimpleATTarget2.h114 } else if (phase == tlm::END_RESP) {
H A DSimpleBusAT.h138 } else { // END_RESP
155 // reset to destination port (we must not send END_RESP to target)
201 // forward END_RESP to target
203 phase = tlm::END_RESP;
232 } else if (phase == tlm::END_RESP) {
/gem5/src/systemc/ext/tlm_core/2/generic_payload/
H A Dphase.hh44 END_RESP enumerator in enum:tlm::tlm_phase_enum
/gem5/src/systemc/tests/tlm/multi_sockets/
H A DMultiSocketSimpleSwitchAT.h178 sc_assert(phase!=tlm::END_RESP);
216 if (phase==tlm::END_RESP){
267 phase_type ph=tlm::END_RESP;
276 //covers a piggy bagged END_RESP to START_RESP
277 phase_type ph=tlm::END_RESP;
289 // to stick END_RESP into a PEQ
305 //phase is always END_RESP
/gem5/util/tlm/src/
H A Dsc_slave_port.cc263 sc_assert(phase == tlm::END_RESP);
319 /* Send END_RESP and we're finished: */
320 tlm::tlm_phase fw_phase = tlm::END_RESP;
348 tlm::tlm_phase phase = tlm::END_RESP;
H A Dsc_master_port.cc181 case tlm::END_RESP:
324 // We need to Wait for END_RESP before sending next BEGIN_RESP
378 status == tlm::TLM_UPDATED && phase == tlm::END_RESP) {
379 // transaction completed -> no need to wait for tlm::END_RESP
382 // we need to wait for tlm::END_RESP
/gem5/src/systemc/tlm_bridge/
H A Dgem5_to_tlm.cc170 // Send END_RESP and we're finished:
171 tlm::tlm_phase fw_phase = tlm::END_RESP;
365 sc_assert(phase == tlm::END_RESP);
406 tlm::tlm_phase phase = tlm::END_RESP;
H A Dtlm_to_gem5.cc129 (status == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
130 // transaction completed -> no need to wait for tlm::END_RESP
133 // we need to wait for tlm::END_RESP
230 case tlm::END_RESP:
384 // We need to Wait for END_RESP before sending next BEGIN_RESP
/gem5/util/tlm/examples/slave_port/
H A Dsc_target.cc141 } else if (phase == tlm::END_RESP) {
142 /* On receiving END_RESP, the target can release the transaction and
145 SC_REPORT_FATAL("TLM-2", "Illegal transaction phase END_RESP"
199 /* Target must honor BEGIN_RESP/END_RESP exclusion rule; i.e. must not
200 * send BEGIN_RESP until receiving previous END_RESP or BEGIN_REQ */
/gem5/src/systemc/tests/tlm/nb2b_adapter/
H A Dnb2b_adapter.cpp136 else if (phase == tlm::BEGIN_REQ || phase == tlm::END_RESP)
143 tlm::tlm_phase fw_phase = tlm::END_RESP;
/gem5/ext/systemc/src/tlm_utils/
H A Dsimple_target_socket.h290 } else if (phase == tlm::END_RESP) {
451 (sync == tlm::TLM_UPDATED && phase == tlm::END_RESP)) ) {
500 phase = tlm::END_RESP;
835 } else if (phase == tlm::END_RESP) {
994 (sync == tlm::TLM_UPDATED && phase == tlm::END_RESP)) ) {
1043 phase = tlm::END_RESP;
H A Dtlm2_base_protocol_checker.h86 nb_transport: phase sequence BEGIN_REQ -> END_REQ -> BEGIN_RESP -> END_RESP
403 if (m_map[&trans].ph > 0 && m_map[&trans].ph < 4) // END_RESP -> BEGIN_REQ is legal
430 case tlm::END_RESP:
472 // Transaction object should not be re-allocated, even during the END_RESP phase
473 //if (phase != tlm::END_RESP)
522 case tlm::END_RESP:
551 // Transaction object should not be re-allocated, even during the END_RESP phase
552 //if (phase != tlm::END_RESP)
578 case tlm::END_RESP:
/gem5/src/systemc/ext/tlm_utils/
H A Dsimple_target_socket.h295 if (phase == tlm::END_RESP) {
462 phase == tlm::END_RESP))) {
511 phase = tlm::END_RESP;
891 if (phase == tlm::END_RESP) {
1056 phase == tlm::END_RESP))) {
1106 phase = tlm::END_RESP;
/gem5/src/systemc/tests/tlm/static_extensions/ext2gp/
H A DSimpleLTInitiator_ext.h244 case tlm::END_RESP: // fall-through
/gem5/src/systemc/tests/tlm/static_extensions/ext2gp2ext/
H A DSimpleLTInitiator_ext.h244 case tlm::END_RESP: // fall-through

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