Searched refs:END_REQ (Results 1 - 22 of 22) sorted by relevance

/gem5/ext/systemc/src/tlm_core/tlm_2/tlm_generic_payload/
H A Dtlm_phase.h29 //enum tlm_phase { BEGIN_REQ, END_REQ, BEGIN_RESP, END_RESP };
31 enum tlm_phase_enum { UNINITIALIZED_PHASE=0, BEGIN_REQ=1, END_REQ, BEGIN_RESP, END_RESP }; enumerator in enum:tlm::tlm_phase_enum
60 case END_REQ: s<<"END_REQ"; break;
/gem5/src/systemc/ext/tlm_core/2/generic_payload/
H A Dphase.hh42 END_REQ, enumerator in enum:tlm::tlm_phase_enum
/gem5/src/systemc/tlm_core/2/generic_payload/
H A Dphase.cc90 names_[END_REQ] = "END_REQ";
/gem5/src/systemc/tests/include/
H A DSimpleBusAT.h129 } else if (phase == tlm::END_REQ) {
135 // Not needed to send END_REQ to initiator
142 // only send END_REQ to initiator if BEGIN_RESP was not already send
144 phase = tlm::END_REQ;
182 // if BEGIN_RESP is send first we don't have to send END_REQ anymore
250 if (phase != tlm::END_REQ && phase != tlm::BEGIN_RESP) {
H A DSimpleATInitiator1.h218 case tlm::END_REQ:
258 case tlm::END_REQ:
H A DSimpleATInitiator2.h214 case tlm::END_REQ:
256 case tlm::END_REQ:
H A DExplicitATTarget.h80 phase = tlm::END_REQ;
H A DSimpleATTarget1.h76 // transactions may be kept in queue after the initiator has send END_REQ
127 phase_type phase = tlm::END_REQ;
H A DSimpleATTarget2.h74 // transactions may be kept in queue after the initiator has send END_REQ
100 phase = tlm::END_REQ;
/gem5/util/tlm/examples/master_port/
H A Dtraffic_generator.cc80 // honor the BEGIN_REQ/END_REQ exclusion rule
112 if (phase == tlm::END_REQ ||
/gem5/util/tlm/src/
H A Dsc_slave_port.cc230 * the END_REQ. This could lead to incorrect delays, if the XBar
232 * the request (time between BEGIN_REQ and END_REQ).
236 * END_REQ. Then, a warning should be printed.
251 /* Accepted but is now blocking until END_REQ (exclusion rule)*/
255 sc_assert(phase == tlm::END_REQ || phase == tlm::BEGIN_RESP);
278 if (phase == tlm::END_REQ ||
H A Dsc_master_port.cc220 if (sendTimingReq(pkt)) { // port is free -> send END_REQ immediately
223 } else { // port is blocked -> wait for retry before sending END_REQ
248 tlm::tlm_phase phase = tlm::END_REQ;
253 "Unexpected status after sending END_REQ");
/gem5/util/tlm/examples/slave_port/
H A Dsc_target.cc137 /* Put back-pressure on initiator by deferring END_REQ until
158 /* ... and to unblock the initiator by issuing END_REQ */
164 } else /* tlm::END_REQ or tlm::BEGIN_RESP */ {
177 bw_phase = tlm::END_REQ;
/gem5/src/systemc/tests/tlm/multi_sockets/
H A DMultiSocketSimpleSwitchAT.h229 if (phase != tlm::END_REQ && phase != tlm::BEGIN_RESP) {
249 if ((phase==tlm::END_REQ) | (connInfo->clearReq)){ //in case the target left out end_req clearReq reminds us to unlock the req port
/gem5/src/systemc/tlm_bridge/
H A Dgem5_to_tlm.cc132 if (phase == tlm::END_REQ ||
331 * the END_REQ. This could lead to incorrect delays, if the XBar
333 * the request (time between BEGIN_REQ and END_REQ).
337 * END_REQ. Then, a warning should be printed.
352 // Accepted but is now blocking until END_REQ (exclusion rule).
356 sc_assert(phase == tlm::END_REQ || phase == tlm::BEGIN_RESP);
H A Dtlm_to_gem5.cc109 tlm::tlm_phase phase = tlm::END_REQ;
114 "Unexpected status after sending END_REQ");
168 if (bmp.sendTimingReq(pkt)) { // port is free -> send END_REQ immediately
171 } else { // port is blocked -> wait for retry before sending END_REQ
/gem5/ext/systemc/src/tlm_utils/
H A Dsimple_target_socket.h149 if (phase == tlm::END_REQ) {
494 case tlm::END_REQ:
680 if (phase == tlm::END_REQ) {
1037 case tlm::END_REQ:
H A Dtlm2_base_protocol_checker.h86 nb_transport: phase sequence BEGIN_REQ -> END_REQ -> BEGIN_RESP -> END_RESP
423 case tlm::END_REQ:
515 case tlm::END_REQ:
585 case tlm::END_REQ:
597 if (m_map[&trans].ph != tlm::BEGIN_REQ && m_map[&trans].ph != tlm::END_REQ)
/gem5/src/systemc/tests/tlm/static_extensions/ext2gp/
H A DSimpleLTInitiator_ext.h233 case tlm::END_REQ:
/gem5/src/systemc/tests/tlm/static_extensions/ext2gp2ext/
H A DSimpleLTInitiator_ext.h233 case tlm::END_REQ:
/gem5/src/systemc/ext/tlm_utils/
H A Dsimple_target_socket.h150 if (phase == tlm::END_REQ) {
505 case tlm::END_REQ:
731 if (phase == tlm::END_REQ) {
1100 case tlm::END_REQ:
/gem5/src/systemc/tests/tlm/nb2b_adapter/
H A Dnb2b_adapter.cpp131 if (phase == tlm::END_REQ || (&trans == request_in_progress && phase == tlm::BEGIN_RESP))

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