Searched refs:CSR_PMPADDR12 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh357 CSR_PMPADDR12 = 0x3BC, enumerator in enum:RiscvISA::CSRIndex
528 {CSR_PMPADDR12, {"pmpaddr12", MISCREG_PMPADDR12}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h824 #define CSR_PMPADDR12 0x3bc macro
1316 DECLARE_CSR(pmpaddr12, CSR_PMPADDR12)

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