Searched refs:CSR_MHPMEVENT23 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh413 CSR_MHPMEVENT23 = 0x337, enumerator in enum:RiscvISA::CSRIndex
583 {CSR_MHPMEVENT23, {"mhpmevent23", MISCREG_HPMEVENT23}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h886 #define CSR_MHPMEVENT23 0x337 macro
1378 DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)

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