Searched refs:CSR_MHPMCOUNTER29 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh389 CSR_MHPMCOUNTER29 = 0xC1D, enumerator in enum:RiscvISA::CSRIndex
560 {CSR_MHPMCOUNTER29, {"mhpmcounter29", MISCREG_HPMCOUNTER29}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h863 #define CSR_MHPMCOUNTER29 0xb1d macro
1355 DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)

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