Searched refs:CSR_MHPMCOUNTER20 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh380 CSR_MHPMCOUNTER20 = 0xC14, enumerator in enum:RiscvISA::CSRIndex
551 {CSR_MHPMCOUNTER20, {"mhpmcounter20", MISCREG_HPMCOUNTER20}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h854 #define CSR_MHPMCOUNTER20 0xb14 macro
1346 DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)

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